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芯片設(shè)計(jì)簡(jiǎn)歷表格
寫個(gè)人簡(jiǎn)歷要有目標(biāo)企業(yè)，更要有目標(biāo)職位，很多大企業(yè)的招聘都是個(gè)別部分的招聘，也是某個(gè)職位的招聘。在寫個(gè)人簡(jiǎn)歷的時(shí)候需要針對(duì)企業(yè)來寫，更能需要針對(duì)求職目標(biāo)來寫。因此第一需要了解的企業(yè)信息，及時(shí)關(guān)于企業(yè)的招聘職位。很多大企業(yè)在招聘的時(shí)候，有很多種方式，常見的就是招聘會(huì)的方式，還有就是部門的招聘方式。如果是企業(yè)的全麻招聘一般是有HR來負(fù)責(zé)，而如果是部分招聘則是由部門經(jīng)理來負(fù)責(zé)。了解不同的招聘方式，主要就是來針對(duì)其篩選簡(jiǎn)歷的方式。
一般來說HR的篩選速度非�？�，閱讀個(gè)人簡(jiǎn)歷也不是很認(rèn)真，以及關(guān)鍵詞為主，而經(jīng)理篩選個(gè)人簡(jiǎn)歷相對(duì)來說更為仔細(xì)一些。在對(duì)企業(yè)進(jìn)行了解上，不僅僅要看起華麗的外表，也要看企業(yè)本身的品格如何。社會(huì)上有很多企業(yè)在經(jīng)營中對(duì)顧客很好，但是對(duì)員工就不好了。要全面了解的企業(yè)，還要看它是不是值得你去爭(zhēng)取。在編寫個(gè)人簡(jiǎn)歷之前，不管是自身職業(yè)發(fā)展來看，還是在寫個(gè)人簡(jiǎn)歷需要用到的信息來看，都要了解其發(fā)展?fàn)顩r。
下面是yjbys小編和大家分享的芯片設(shè)計(jì)簡(jiǎn)歷表格，更多相關(guān)資訊請(qǐng)點(diǎn)擊(www.ruiwen.com/jianli)。
| Name：yjbys | Hukou： | |||||
| Residency： | Work Experience： | |||||
| Current Salary： | Tel： | |||||
| E-mail：www.ruiwen.com/jianli | ||||||
| Career Objective | ||||||
| Desired Industry： | Electronics/Semiconductor/IC | |||||
| Desired Position： | IC Design/Application Engineer | |||||
| Desired address： | Shanghai ,Beijing ,Shenzhen | Desired Salary： | ￥10,000-14,999/Month | |||
| Work Experience | ||||||
| 2003/02—Present | ***Company | |||||
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Industry: Electronics/Semiconductor/IC R&D IC Design/Application Engineer Responsibilities： Analog circuits design include CMOS Operational Amplifiers design, Switched Capacitor circuits, clock detecting, clock design, bandgap, PLL, power on reset etc Attend system design use matlab and verify the data from hspice using matlab digital synthesis using Synopsys_DC, timing analysis, Formality, create circuit framework, P&R using Apollo Interaction with layout designer for analog circuit’s layout. |
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| 2001/02—2003/02 | STATE Microelectronics Co. LTD | |||||
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Industry: Electronics/Semiconductor/IC R&D IC Design/Application Engineer Responsibilities： Create model of unit, circuit analysis and simulation, writing test coding, chip testing Study IC design tools: hspice star_sim verilog_XL NCverilog Synopsys Design Compiler/Analyzer etc Study Computer architecture. |
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| 2000/07—2001/02 | LianShun(DaLian) Microelectronics Co. Limited | |||||
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Industry: Electronics/Semiconductor/IC R&D IC Design/Application Engineer Responsibilities： Practice in IC foundry for 2 months; Study drawing layout、circuit simulation 、writing program use verilog Participate in designing the chip for music. |
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| Education and Training | ||||||
| 1996/09—2000/07 | Hunan University Microelectronics Bachelor | |||||
| Circuit; Analog/digital/high frequency electronics technique; HW and interface of computer; Programming of ASM; C programming; IC theory; IC application; Microelectronic devices; Transistor theory ; Semiconductor Physics , Professional physical ,theory and application of sensor, Theory of TV etc | ||||||
| Professional Skills | ||||||
| Language Skills： | English GOOD | |||||
| Self-appraisal | ||||||
| Aspire to employ new ideas, concepts, methods and technologies Energetic and self-motivated team player Excellent communication, interpersonal, and leadership skills Thrive in both independent and collaborative work environments. | ||||||
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